Dr YNM

Helps , to understand the cutting egde technologies viz. Embedded IOT , AI & VLSI DESIGN at the basic level and aims at imparting the basic knowledge to enhance your passion for the domain. Provide tutorials & lecture notes related to these domains.
All the lectures are downloadable. Best support will be extended for those enthusiasts who have the passion for these domains.

Differences Between FET & BJT

Differences Between FET & BJT
INTRODUCTION TO FIELD EFFECT TRANSISTOR( FET)

INTRODUCTION TO FIELD EFFECT TRANSISTOR( FET)
WORKING OF A BIPOLAR JUNCTION TRANSISTOR(BJT)

WORKING OF A BIPOLAR JUNCTION TRANSISTOR(BJT)
BJT CONFIGURATIONS CE,CB,CC

BJT CONFIGURATIONS CE,CB,CC
Bipolar Junction Transistor I- Introduction

Bipolar Junction Transistor I- Introduction
CISC & RISC ARCHITECTURES

CISC & RISC ARCHITECTURES
Lect 1 :: ARM Processors

Lect 1 :: ARM Processors
LEC 11:: VERILOG TASKS & FUNCTIONS

LEC 11:: VERILOG TASKS & FUNCTIONS
Lect 10 :: VERILOG TEST BENCH

Lect 10 :: VERILOG TEST BENCH
Microprocessor Architecture 1

Microprocessor Architecture 1
LEC 1:: Basics of Microprocessors

LEC 1:: Basics of Microprocessors
Why System Verilog ?

Why System Verilog ?
LEC 9 :: VERILOG ABSTRACTION LEVELS

LEC 9 :: VERILOG ABSTRACTION LEVELS
Lect 7: Verilog Behavioral Model

Lect 7: Verilog Behavioral Model
Lect 6: VERILOG OPERATORS -FOR ABSOLUTE BEGINNERS

Lect 6: VERILOG OPERATORS -FOR ABSOLUTE BEGINNERS
LECTURE-5 :: VERILOG DATA TYPES- For absolute Beginners

LECTURE-5 :: VERILOG DATA TYPES- For absolute Beginners
LECTURE 4- DATA FLOW MODELLING

LECTURE 4- DATA FLOW MODELLING
Lecture-3 :Gate Level Modelling -Verilog Programming

Lecture-3 :Gate Level Modelling -Verilog Programming
Lec 2:; RTL Basics- Digital Design using Verilog For Absolute Beginners

Lec 2:; RTL Basics- Digital Design using Verilog For Absolute Beginners
Lec 1 :: Digital Design Using Verilog - For Absolute Beginners

Lec 1 :: Digital Design Using Verilog - For Absolute Beginners