Dgtronix
The Main Signal & Power Integrity Event In Israel!
www.dgcon.info/
PCIe GND Via Location Rev01
uVia Optimization
Dgtronix - Celebrating 14 Years
Cross Talk Basics
"Low Speed" Interfaces - are they really?
Why Simulate at all?
PCB Manufacturing Tolerances & High Speed Design
Dgtronix - Decision Factors
Dgtronix 2020
Dgtronix Story Timeline
The Return Loss (RL) evolution - Effective Return Loss (ERL) to substitute RL - HEB
DgCon 2019 - Steve Sandler - Power Related Noise in Distributed Systems
Stop being a robot - Teaser
DgTronix Company Trip 2019 Summary
DGCON 2019- One on One talk with Cristian Filip, Mentor Graphics
DGCON 2019- Deep dive into the SerDes compliance requirements
A Practical Guide to Signal Integrity: From Simulation to Measurement
One on One talk with Mike Resso, Signal Integrity Application Scientist Keysight Technologies
DGCON 2019-The Main Signal & Power integrity Event In Israel!
DGCON 2019, by Dgtronix - Hardware Design in the fields of Signal & Power Integrity
Hee-Soo Lee , Keysight Technologies, sharing knowledge at DGCON 2019
Mike Resso , Keysight Technologies, sharing knowledge at DGCON 2019
Have you signed up yet for DGCON 2019?
How to Explore High Speed Connector Performance
Onix asic emulation platform
Via Controlled Impedance Fine Tuning for Very High Speed Signals
Pinout Definition Optimization when using High Speed Connectors
PCB Material and Copper Foil Considerations for Signal Integrity by Jeff Loyer, from Altium
The Innovation Partner
Optical signal characterization in PAM4 links by Pavel Zivny from Tektronix