Dr's Gyan Hub

A perfect place for students, learners, and knowledge-seekers to understand Science, Mathematics, Computer and Electronics Engineering in a simple and enjoyable way.
Here, we believe that learning should be exciting, practical, and stress-free. Our mission is to make complex concepts easy to understand through clear explanations, real-life examples, experiments, problem-solving, and interactive learning.

Subject Cover:

B.TECH
Digital Electronics
Computer Organization / Computer Architecture
Basic Electrical & Electronics Engineering
Network and Control System
Analog Electronics / Circuit Analysis
Pulse and Digital Circuits
Electromagnetic Waves and Transmission Lines
Antenna & Wave Propagation
Microwave Engineering
Analog and Digital Communication

Class XI & XII
Physics

Class IX & X
Mathematics
Science

PYQ.1 16x1 Multiplexer Simplified by 4x1 Multiplexer🔥| How selection lines Control?| GATE, ESE

L3.15 2x4 Line Decoder | Decoder with Enable Input | Decoder De-multiplexer

L3.17 Priority Encoder Simplified |🔥 Why Valid Bit Indicator is used | GATE, ESE, Polytechnic Exam

L3.16 8x3 Encoder with OR gates | Undefined Output in Encoder | GATE, ESE, Polytechnic Exam

L3.14 3x8 Line Decoder Simplified | Decoder by using AND gate |GATE, ESE, Polytechnic Exam

L3.11 2x1 & 4x1 Multiplexer Simplified 🔥 |How to decide Selection line | GATE, ESE, Polytechnic Exam

L3.10 Magnitude Comparator Explained by using Algorithm🔥 | EX-NOR gate |GATE, ESE, Polytechnic Exam

L3.13 De-multiplexer Explained| How Selection Lines Decide O/P |GATE, ESE, Polytechnic

L3.9 Two bit Magnitude comparator 🔥| Combinational Circuit | GATE, ESE, Polytechnic

L3.12 Boolean function Implemented by 8x1 MUX🔥| Is I/P Selection Line? |GATE, ESE, Polytechnic Exam

L4.26 Johnson Counter Decoded | Synchronous Counter | Twisted Ring | Switch Tail Counter

L4.23 Ripple Counter Explained 🔥| Asynchronous Counter | GATE, ESE, Polytechnic | UP/DOWN Counter

L4.25 Ring Counter Using Shift Register🔥,Decoder| Synchronous | Why Unused States| GATE, ESE

L4.24 Decade Counter| BCD Counter, Why 0-9 | Mod-10 Counter Examined | GATE, ESE, Polytechnic

L4.21 PISO Made Easy 🔥 | How Parallel-In Serial-Out Happen | PISO Concept Explained

L4.22 Universal Shift Register Secret Explained | 🔥How selection lines Decide All Tasks

L4.19 Serial-In Serial-Out Explained 🔥 | SISO | How Shifting Occur | Exam Specific

L4.18 Shift Register Explained | SISO, SIPO, PISO, PIPO | ONE SHOT

L4.20 Serial In Parallel Out Made Easy | SIPO 🔥| Shift Register

L5.6 🔥How to Implement Programmable Array Logic F1(A,B,C)=Σ(0, 1, 2, 4),F2(A,B,C)=Σ(0, 5, 6, 7)|Exam

L5.5 How to Implement PLA for F1(A,B,C)=Σ(3, 5, 7), F2(A,B,C)=Σ(4, 5, 7) with 3 product terms 🔥|Exam

L4.16 State reduction made Easy 🔥 | How to draw reduced State diagram | Exam Oriented 🔥

L4.15 State Reduction & Reduced State Diagram |How to Reduce States| Algorithm

L4.17 State Assignment Tricks 🔥 | How to Do State Assignment?

L4.14 Design D flip flop by using SR flip flop | Conversion SR FF to D FF

L4.13 Design JK Flip Flop by using D Flip Flop | Conversion D FF to JK FF

L4.12 Design SR flip flop by using D flip flop | Conversion D FF to SR FF

L4.11 Design T Flip Flop by using D Flip Flop | Conversion D FF to T FF

L4.10 HOW TO WRITE EXCITATATION TABLE | SR FF | D FF | JK FF | T FF