Laboratory for Nano Integrated Systems - UofU

LSOracle: Using Artificial Intelligence to Design the Next Generation of Computers

LNIS PhD Story - OpenFPGA : Highly-customizable FPGA IP Generator

LNIS PhD Story - Functionality-enhanced devices for extending Moore's Law

OpenFPGA: how to implement user_defined_template.v file

FROG Testchip Bringup

Digital VLSI Design - E05 - Procedural assignments in Verilog

Digital VLSI Design - E04 - Continuous assignments in Verilog

Digital VLSI Design - E03 - Verilog - Generalities

Digital VLSI Design - E02 - Introduction to VLSI

Digital VLSI Design - E01 - Administrativia

Embedded Systems - E32 - Generalities about Real-Time Operating Systems

Embedded Systems - E33 - Basic Mechanism of Operating Systems

Embedded Systems - E35 - Real-time Specificities

Embedded Systems - E34 - Synchronization in Embedded OS

Embedded Systems - E31 - Cascade Composition

Embedded Systems - E30 - Extended Finite State Machines

Embedded Systems - E29 - Modal Behavior

Embedded Systems - E28 - Continuous Dynamics

Embedded Systems - E27 - Introduction to CPS Modeling

Embedded Systems - E23 - I2C

Embedded Systems - E26 - ADCs

Embedded Systems - E22 - UART

Embedded Systems - E24 - Analog Interface

Embedded Systems - E21 - Communications

Embedded Systems - E25 - DACs

Embedded Systems - E14 - Hardware Implication on Software

Embedded Systems - E20 - Watchdog Timer

Embedded Systems - E19 - Timer Capture and Compare Modes

Embedded Systems - E18 - Timer Counter Mode

Embedded Systems - E17 - General Purpose Timers