DVD - Kahoot for Lecture 5: Timing Analysis

Bar-Ilan University 83-612: Digital VLSI Design
This is the Kahoot! quiz to accompany Lecture 5 of the Digital VLSI Design course at Bar-Ilan University. In this course, I cover the basics of Chip Implementation, from designing the logic (RTL) to providing a layout ready for fabrication (GDS).

The full lecture can be found at:    • DVD - Lecture 5: Timing (STA)  
Kahoots can be accessed through my Kahoot! profile at https://create.kahoot.it/profiles/e23...

Lecture slides can be found on the EnICS Labs web site at:
https://enicslabs.com/academic-course...

All rights reserved:
Prof. Adam Teman
Emerging nanoscaled Integrated Circuits and Systems (EnICS) Labs
Faculty of Engineering, Bar-Ilan University