Domino Memory And Subtraction (Without Subtracting) | Domino Computing #2

Time to upgrade the adder circuit from Part 1! First, we'll introduce simple memory circuits that can store data to make timing clean and easy. Then, we'll look at how computers subtract, and make changes to our adder so that it can perform subtraction as well!

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IMPORTANT NOTES:

Why is the overflowing bit ignored at 5:25?

Two's complement is designed to work with inputs and output of fixed and equal length. Since we have 4-bit inputs in the example, the output must also be 4 bits; any additional bits are not part of the answer and can be ignored. Those bits are just byproducts of potential wrap-arounds, like when going from -1 (1111) to 0 (0000).

This is also the reason why the final circuit contains 6 full adders: since we need enough bits to represent a maximum sum of 30 (5 bits) as well as a sign bit, our circuit is technically 6-bit.

Even though our adder has 4-bit inputs (which are 5-bit conceptually, as explained in the video), they must be treated as the lower 4 bits of 6-bit inputs to match the width of the output. I apologize for forgetting to explain this in the video.

0:00 Intro
0:36 Improving the Inputs
1:45 Domino Memory
3:29 Subtraction and Negation
4:15 Sign-Magnitude Representation
6:04 Two's Complement
8:43 Designing the Circuit
11:05 Conditional Inverter
12:49 Putting it Together
13:26 Demo
15:15 Next Steps
15:36 Outro

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