🔍 SVS-ACE: Automated Schematic vs. Schematic Verification Tool | SKILL Project by PinE Trainees

🎓 Project Name: SVS-ACE – Automated SVS Clean Verification Tool
👩‍💻 Developed by: Komal Mishra & Ansh Pratap Solanki
🎓 Batch: ASIC & Custom Layout | PinE Training Academy
🛠️ Tool Used: Cadence Virtuoso Design Environment (IC6.1.8)
💻 Tech: SKILL Scripting

📌 About the Project
SVS-ACE is a powerful automation tool that simplifies and accelerates the process of Schematic vs. Schematic (SVS) comparison and schematic database report generation—without even opening the designs in Cadence!

🔍 Features:
✔️ Compare two schematics for:
 • Instances & names
 • Master libraries
 • CDF/user-defined properties
 • Nets & terminals (e.g., gate, drain, source)

📊 Generate Clean Reports for:
 ✅ Schematic comparison
 ✅ Schematic structure overview

✨ Benefits:
🚫 No need to open designs
⚡ Saves time for large & complex circuits
✔️ Higher accuracy in verification
📤 Shareable reports for easy collaboration

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