7.4 - Applying Eulers path for stick diagram representations
Автор: NPTEL-NOC IITM
Загружено: 2022-10-10
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7.4 - Applying Eulers path for stick diagram representations
The lecture emphasizes on placing the polysilicon gates in an optimized order to achieve compact layout. Applying Eulers path for achieving compact layout is explained in this lecture by taking two combinational circuit gates. The lecture also discusses on extracting parastic capacitances from the stick diagram.
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