Скачать
FPGA Programming with Verilog : Full Adder BASYS3
Автор: drselim
Загружено: 2021-11-26
Просмотров: 36172
Описание:
In this video we'll learn how to write the Verilog design & simulation codes for the 4-bit full adder logic circuit. Then by using Vivado Design Suite, we'll first run our simulation and then by modifying the master xdc file, we'll implement our design on a BASYS FPGA Board.
0:00 Introduction
0:32 Full Adder Logic Circuit & Verilog Code
2:20 4-Bit Addition & 4-Bit Full Adder
5:51 4-Bit Full Adder Verilog Code
7:09 4-Bit Full Adder Simulation Code
8:31 Design & Simulation in Vivado Design Suite
14:59 Inputs & Outputs in BASYS3 Board
16:43 Modifying the .xdc file
20:50 Implementation on BASYS3 by generating bitstream
Доступные форматы для скачивания:
Скачать видео mp4
-
Информация по загрузке:
