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IDesignSpec: Executable Register Specification -- Agnisys
Автор: EE Journal
Загружено: 2017-11-27
Просмотров: 40696
Описание:
Getting RTL right for your chip design is a difficult engineering and verification challenge with very high stakes. And, most of us use a variety of tools - including spreadsheets and text documents - to capture our design intent and details. In this episode of Chalk Talk, Amelia Dalton chats with Anupam Bakshi from Agnisys about some great solutions for getting from design specifications into verified RTL.
For more information: http://bit.ly/2AfDhI9
Name : Anupam Bakshi
Designation :CEO, Agnisys Inc.
Twitter : @bakshia
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