C-S²QED Gap-free Formal Verification of Processor Cores

Автор: Accellera

Загружено: 2025-05-19

Просмотров: 9

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Tutorial presented at DVCon Europe 2020

In today’s computer age, processor cores are ubiquitous in every electronic device. Electronic device suppliers build processor cores with a wide range of target applications. Some of these processors are custom built to target specific applications such as signal processing, graphics processing or central processing units that control the operations of a system. Recently, there has been a spike in the design and verification of highly customized processors to address the demands placed by internet-of-things (IoT), artificial intelligence (AI) and other advanced applications.

The processor cores perform computations (by executing instructions), store results and interact with the peripherals devices as specified by an application or a program. The circuitry of processor cores is highly optimized to meet non-functional metrics such as throughput, area and power consumption. Due to the complex nature of these processor cores, ensuring the functional correctness at pre-silicon stage becomes an enormous challenge. Formal verification (FV) exhaustively analyses the design state space and helps to find all logic bugs. However, ensuring that the design space is completely analyzed with a set of properties requires high formal verification expertise and involves laborious manual efforts. As a result, processor verification in industrial practice heavily relies on simulation-based methods, including software and hardware-assisted simulation.

Speakers:
Keerthikumara Devarajegowda, Infineon Technologies AG
Mohammad Rahmani Fadiheh, Technische Universität Kaiserslautern

https://dvcon-europe.org
https://accellera.org

C-S²QED Gap-free Formal Verification of Processor Cores

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