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FPGA Dev Live Stream: 10G PHY, 64b/66b, and DFE: Building a Transceiver Watchdog
Автор: Alex Forencich
Загружено: 2021-10-15
Просмотров: 8551
Описание:
FPGA development live stream: building a watchdog to reset a 10G serdes when the DFE gets stuck. Includes discussions of how high-speed serializers work, including decision-feedback equalization (DFE), how the 10G Ethernet physical layer works, and ways to detect when the receiver DFE is misbehaving as a result of an interrupted input signal.
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