Z80 SBC - VHDL - Cyclone IV FPGA

Z80 CPU running BASIC Ver 4.7b with 8kB ROM, 8kB RAM and UART all implemented inside the FPGA. Cyclone IV FPGA with 6000 LE used.
EPCS4 configuration FLASH memory.

Altera QUARTUS 18.1 lite version used.

LED output at I/O port and ASCIIART demo included.

https://www.hackster.io/mit41301/soft...

This Z80 VHDL based on T80 core

https://opencores.org/projects/tv80

Aaron Brady's Z80 VHDL implementation on ep4ce6e22 fpga can be found at

https://2023.insom.me.uk/2016/12/13/f...

same project using Quartus 9.1sp2 can be found at

https://github.com/mit41301/Z80-Quart...

The above version includes 8kB ROM and 8kB RAM version which can be restored using Quartus 9.1sp2 or any of the Quartus versions above 9.1sp2. Tested with Quartus 18.1 and working perfectly.

Source file and BASIC examples using Quartus 18.1

https://github.com/mit41301/Z80-EP4CE...

The board details, pinout and examples at

https://github.com/mit41301/EP4CE6E22...

We can also use any other compatible FPGA board with external USB-TTL at 115200 baud.

We are not using any of the PLL. But we are using Mega wizard for 8kB ROM and RAM.

It's easy to migrate within Altera Cyclone family of FPGA devices.

#altera
#intel
#quartus
#vhdl
#IEee1076
#verilog
#systemverilog
#Zilog
#z80
#fpga
#cpld
#programmable
#logic
#digital
#ram
#rom
#UART